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Abstract
This paper focuses on design and implementation of 1.1V, 4-bit Pipeline Analog to Digital Converter [ADC]. The ADC consists of sample and hold, latched comparator and summing circuit and amplifier of gain 2. The ADC has been designed and simulated in standard gpdk90ηm CMOS technology library using Cadence tool.
Keywords: ADC, CMOS, gpdk90ηm.
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How to Cite
Lakkannavar, M., & Hosur, M. K. N. (2014). Design and Implementation of 4-bit Pipeline ADC using 0.09µm CMOS Technology. International Journal of Emerging Trends in Science and Technology, 1(03). Retrieved from https://igmpublication.org/ijetst.in/index.php/ijetst/article/view/119
References
References
[1] P.E. Allen and D.R Holberg,†CMOS Analog Circuit Designâ€, Secon Edition, Oxford University Press, 2002.
[2] Stephen H. Lewis and Paul. Gray, “A Pipelined 5-Msample/s 9-bit Analog-to-Digital Converterâ€, IEEE J. Solid-State Circuits, vol. 22, issue.12,pp. 954-961, Dec. 1987
[3] R. van de Plassey, “CMOS Analog-to-Digital and Digital-to-Analog Converters,†Springer, Delhi, 2005
[4] A. M. Abo and P. R. Gray, “A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter,â€IEEE J. Solid-State Circuits, vol. 34, no. 5, pp.599–606, May 1999.
[5] A. M. Abo and P. R. Gray, “A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter,†IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599–606, May 1999.
[6] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design,Second Edition, Oxford University Press, (2003).
[7] J. M. Rabaey, A. Chandrakasan, and B. Nikolic′, “Digital Integrated Circuitsâ€,2nd Edition, 2003
[8] Razavi, Behzad; Principles of Data Conversion System Design; IEEE Press.
[9] Baker, R. Jacob, Li, Harry W., Boyce, David E., CMOS Circuit Design, Layout, and Simulation, 1st on edition (IEEE Press Series on Microelectronic Systems).
[10] Van De Plassche, Rudy; Integrated Analog-to-Digital and Digital-to-Analog Converters; Kluwer Academic Publishers, 1994.
[11] J. Yoo, "A TIQ Based CMOS Flash A/D Converter for System-on-Chip Applications", PhD Thesis, the Pennsylvania State University, May 2003.
[12] L. Dai, R. Harjani, “CMOS Switched-Op-Amp-Based Sample-and-Hold CircuitIEEE Journal of Solid-State Circuits, vol. 35, no. 1, pp. 109-113, January 2000.
[13] IEEE, "Std 1241-2000 IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters," 2009.
[14] Chang-Hyuk Cho,“A POWER OPTIMIZED PIPELINED ANALOG-TO-DIGITAL CONVERTER DESIGN IN SUB-MICRON CMOS TECHNOLOGY†A Thesis Presented, Dec 2005.
[15] http://www.cadence.com/company/university/na.html
[1] P.E. Allen and D.R Holberg,†CMOS Analog Circuit Designâ€, Secon Edition, Oxford University Press, 2002.
[2] Stephen H. Lewis and Paul. Gray, “A Pipelined 5-Msample/s 9-bit Analog-to-Digital Converterâ€, IEEE J. Solid-State Circuits, vol. 22, issue.12,pp. 954-961, Dec. 1987
[3] R. van de Plassey, “CMOS Analog-to-Digital and Digital-to-Analog Converters,†Springer, Delhi, 2005
[4] A. M. Abo and P. R. Gray, “A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter,â€IEEE J. Solid-State Circuits, vol. 34, no. 5, pp.599–606, May 1999.
[5] A. M. Abo and P. R. Gray, “A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter,†IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 599–606, May 1999.
[6] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design,Second Edition, Oxford University Press, (2003).
[7] J. M. Rabaey, A. Chandrakasan, and B. Nikolic′, “Digital Integrated Circuitsâ€,2nd Edition, 2003
[8] Razavi, Behzad; Principles of Data Conversion System Design; IEEE Press.
[9] Baker, R. Jacob, Li, Harry W., Boyce, David E., CMOS Circuit Design, Layout, and Simulation, 1st on edition (IEEE Press Series on Microelectronic Systems).
[10] Van De Plassche, Rudy; Integrated Analog-to-Digital and Digital-to-Analog Converters; Kluwer Academic Publishers, 1994.
[11] J. Yoo, "A TIQ Based CMOS Flash A/D Converter for System-on-Chip Applications", PhD Thesis, the Pennsylvania State University, May 2003.
[12] L. Dai, R. Harjani, “CMOS Switched-Op-Amp-Based Sample-and-Hold CircuitIEEE Journal of Solid-State Circuits, vol. 35, no. 1, pp. 109-113, January 2000.
[13] IEEE, "Std 1241-2000 IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters," 2009.
[14] Chang-Hyuk Cho,“A POWER OPTIMIZED PIPELINED ANALOG-TO-DIGITAL CONVERTER DESIGN IN SUB-MICRON CMOS TECHNOLOGY†A Thesis Presented, Dec 2005.
[15] http://www.cadence.com/company/university/na.html