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Abstract
In this era of high end devices, the power efficient architecture is taking responsibility so as to reduce
the cost for maintenance. This becomes the critical task for embedded based device, graphical based
processor and similar DSP processors which suffers with low power. The core of every embedded
device and processor which in turn uses ALU as the workhorse. As we know if workhorse require less
power, speed and area so based on that workhorse complete system will make justice with SPAA
metrics (Speed, Power, Area and Accuracy). This paper present a review study on different type of
exsisting ALU design. Here we also implement that different ALU logic by using of Verilog HDL on
Xilinx tool. The synthesized architecture is implemented by Hardware descriptive language (Verilog).
Analysis is performing on FPGA (Field Programmable Gate Array) level.