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Abstract

Integrated regulators are used for power management in modern portable devices. There are many primary regulators and post regulators which converts high dc voltages, but they are unable to work on low voltage with low quiescent current. A low-voltage low-dropout regulator with current splitting technique is proposed which converts a low-voltage of 1V to an output of 0.6 V with 90 nm CMOS technology. A power noise cancellation mechanism is formed at rail-to-rail output stage of error amplifier (EA) which minimizes the size of power MOS transistor. A transient accelerator (TA) is formed to reuse the part of EA which achieves high current efficiency.

Keywords: Fast Transient Response, High Power Supply Rejection, Low Dropout (LDO) Regulator, Low Input Voltage

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Author Biography

Anurag Pise, Akash Bhagat, Yeshwantrao Chavan College of Engineering, RTMNU University, Hingna Road, Nagpur

PG Scholar
How to Cite
Akash Bhagat, A. P. (2015). Low Voltage Low Dropout Regulator with Current Splitting Technique. International Journal of Emerging Trends in Science and Technology, 2(07). https://doi.org/10.18535/ijetst/v2i601

References

1. Chung Hsun Huang, Ying Ting Ma and Wei Chen Liao, “Design of a Low-Voltage Low-Dropout Regulator”, IEEE Transactions on VLSI Systems, Volume 22, No.6, June 2014.
2. A. P. Patel and G. A. Rincon Mora, “High Power Supply Rejection (PSR) Current-Mode Low-Dropout(LDO) Regulator”, IEEE Transactions on Circuits Systems II, Exp. Briefs, Volume 57, No.11, pp. 868-873, Nov. 2010.
3. M. El Nozahi, A. Amer, J. Torres, K. Entesari and E. Sanchez Sinencio, “High PSR Low Dropout Regulator with Feed-Forward Ripple Cancellation Technique”, IEEE Journal on Solid State Circuits, Volume 45, No.3, pp. 565-577, March 2010.
4. H. C. Lin, H. H. Wu and T. Y. Chang, “An Active Frequency Compensation Scheme for CMOS Low-Dropout Regulators with Transient Response Improvement”, IEEE Transactions on Circuits Systems II, Exp. Briefs, Volume 55, No.9, pp. 853-857, Sep. 2008.
5. J Hu, B. Hu, Y. Fan and M. Ismail, “A 500 nA quiescent, 100 mA Maximum Load CMOS Low-Dropout Regulator”, In Proceedings of the IEEE International Conference on Electronics Circuits Systems, December 2011, pp. 386-389.
6. X. Lai, J. Guo, Z. Sun and J. Xie, “A 3A CMOS Low-Dropout Regulator with Adaptive Miller Compensation”, Analog Integrations on Circuits Signal Process, Volume 49, pp. 5-10, Oct. 2006.
7. C. K. Chava and J. Silva Martinez, “A Frequency Compensation Scheme for LDO Voltage Regulators”, IEEE Transactions on Circuits and Systems I: Regular papers, Volume 51, pp. 1041-1050, June 2004.
8. J. Hu, W. Liu and M. Ismail, “Sleep-mode Ready, Area Efficient Capacitor-free Low-Dropout Regulator with Input Current-differencing”, Analog Integrations on Circuits Signal Process, Volume 63, pp.107-112, Jan. 2010.
9. Do Couto, “Low Dropout Voltage Regulator using Multi-Gate Transistors”, U.S. patent 7 928 706, April 2011.
10. Y. Shiyang, Z. Xuecheng, Z. Zhige and C. Xiaofei, “A Loop-improved Capacitor-less Low-Dropout Regulator for SoC Power Management Applications”, IEEE Asia-Pacific Conference on Power and Energy Engineering, Volume 10, pp. 1-4, March 2009.
11. W. M. C. Sansen, Analog Design Essentials. New York, NY, USA : Springer Verlag, 2008, Chapter 7.
12. G. A. Rincon Mora, Analog IC Design with Low-Dropout Regulators, New York, NY, USA: McGraw-Hill, 2009, Chapter 1.