##plugins.themes.academic_pro.article.main##
Abstract
An efficient novel technique of synthesis of a low arithmetic complexity, linear phase low pass FIR filter is proposed .The output response is modeled using trigonometric functions of frequency and its slopes. This approach has the advantages of ease of computation of the impulse response and reduction in the Gibb’s phenomenon. The synthesized filter proves to be a good alternative to the existing FIR filters. This paper deals with the design of 16-tap FIR filter and proposed work has been done using Xilinx ISE 9.2i evaluating the performance by the synthesis report and shown the synthesizes RTL schematic along with the simulation results.
Keywords: FIR, Transversal, VHDL, Digital Signal Processing, VLSI Signal Processing.##plugins.themes.academic_pro.article.details##
How to Cite
Pattnaik, S. S., & Siba Kumar Panda, R. D. (2015). Design of Low Power Transversal FIR Filter For VLSI Signal Processing Applications. International Journal of Emerging Trends in Science and Technology, 2(04). Retrieved from http://igmpublication.org/ijetst.in/index.php/ijetst/article/view/602
References
1. Haykin, Simon, Adaptive Filter Theory, Prentice Hall, Upper Saddle River, New Jersey, 1996.
2. Abul Fazal Reyas Sarwar1, Saifur Rahman2, “Design of Multiplier Less 32 Tap FIR Filter using VHDLâ€, International OPEN ACCESS Journal Of Modern Engineering Research, Vol. 4 Iss. 6 June. 2014.
3. Achinta Roy, “DESIGN OF 30-TAP FIR FILTER USING VHDLâ€,2014.
4. Fábio Fabian Daitx,†VHDL Generation of Optimized FIR Filtersâ€, VHDL Generation of Optimized FIR Filters, 978-1-4244-2628-7/08/$25.00 ©2008 IEEE.
5. Yan Sun and Min Sik Kim,†A High-Performance 8-Tap FIR Filter Using Logarithmic Number Systemâ€, School of Electrical Engineering and Computer Science Washington State University.
6. Mrs.Vidya H. Deshmukh, Dr. Abhilasha Mishra, Prof. Dr.Mrs.A.S.Bhalchandra, “FIR Filter Design on Chip Using VHDLâ€, IPASJ International Journal of Computer Science (IIJCS), Volume 2, Issue 7, July 2014
7. Deepshikha Bharti #1, K. Anusudha*2,†High Speed FIR Filter Based on Truncated Multiplier and Parallel Adderâ€, International Journal of Engineering Trends and Technology (IJETT) – Volume 5 Number 5 - Nov 2013.
2. Abul Fazal Reyas Sarwar1, Saifur Rahman2, “Design of Multiplier Less 32 Tap FIR Filter using VHDLâ€, International OPEN ACCESS Journal Of Modern Engineering Research, Vol. 4 Iss. 6 June. 2014.
3. Achinta Roy, “DESIGN OF 30-TAP FIR FILTER USING VHDLâ€,2014.
4. Fábio Fabian Daitx,†VHDL Generation of Optimized FIR Filtersâ€, VHDL Generation of Optimized FIR Filters, 978-1-4244-2628-7/08/$25.00 ©2008 IEEE.
5. Yan Sun and Min Sik Kim,†A High-Performance 8-Tap FIR Filter Using Logarithmic Number Systemâ€, School of Electrical Engineering and Computer Science Washington State University.
6. Mrs.Vidya H. Deshmukh, Dr. Abhilasha Mishra, Prof. Dr.Mrs.A.S.Bhalchandra, “FIR Filter Design on Chip Using VHDLâ€, IPASJ International Journal of Computer Science (IIJCS), Volume 2, Issue 7, July 2014
7. Deepshikha Bharti #1, K. Anusudha*2,†High Speed FIR Filter Based on Truncated Multiplier and Parallel Adderâ€, International Journal of Engineering Trends and Technology (IJETT) – Volume 5 Number 5 - Nov 2013.